Chip fabrication using layers just 3 atoms thick
Researchers from the American Stanford University are working on a new chip fabrication technology that could further improve miniaturization to ensure that Moore's Law doesn’t hit the buffers anytime soon. Thinking outside the ‘silicon box’ they succeeded in using layers of new types of materials only three atoms thick. This is much thinner than the structures used in the production of conventional silicon chips...
Researchers at Stanford University are working on a new chip fabrication technology that could further improve miniaturization to ensure that Moore's Law doesn’t hit the buffers anytime soon. Thinking outside the ‘silicon box’ they succeeded in using layers of new types of materials only three atoms thick. This is much thinner than the structures used in the production of conventional silicon chips.
In order to produce such ultra-thin films, the researchers first incinerate small amounts of molybdenum and sulfur until the atoms vaporize and are deposited as an ultra thin crystalline layer on a substrate such as glass or silicon. Because they are so thin the films have a thickness-to-width ratio of 25 million to one at a width of 1.5 mm. The surface is then etched to make the transistor switch. If the structure of the switching elements could be vertically orientated rather than horizontal, this new process would allow a massive increase in the transistor density compared with conventional chip fabrication methods.
In order to produce such ultra-thin films, the researchers first incinerate small amounts of molybdenum and sulfur until the atoms vaporize and are deposited as an ultra thin crystalline layer on a substrate such as glass or silicon. Because they are so thin the films have a thickness-to-width ratio of 25 million to one at a width of 1.5 mm. The surface is then etched to make the transistor switch. If the structure of the switching elements could be vertically orientated rather than horizontal, this new process would allow a massive increase in the transistor density compared with conventional chip fabrication methods.
