The ESP32-C3 is Espressif's first RISC-V-only-based SoC design. It offers a low-cost, feature-rich alternative to the ESP8266 and even more.
The ESP32-C3 has officially been announced by Espressif as its first RISC-V only based SoC design. It is Espressif's newest Wi-Fi- and BLE-enabled chip meant for applications where an ESP8266's resources are too low and an ESP32's or ESP32-S2's are too costly.
ESP32-C3 Essentials
The ESP32-C3 offers a low-cost solution for IoT applications while providing an appropriate security level for common security threats. An overview of the chip's internal blocks, grabbed from the datasheet, is shown in Figure 1. Figure 1: ESP32-C3 function blocks (Source: Espressif).
Key features:
Single-core, 32-bit, RISC-V-based MCU which is capable of running at 160MHz
2x UART (support RS232, RS485 IrDA with up to 5MBaud)
1x I2C (up to 800kBit)
1x I2S
RMT (Remote Control Peripheral)
TWAI (CAN 2.0b compatible/ISO 11898-1)
PWM
The ESP32-C3 adds security functions like Secure Boot, Flash Encryption, Digital Signature and HMAC Peripheral and a World Controller. The last of these enables two execution environments that are isolated form each other. Depending on the configuration, this can be used to form a Trusted Execution Environment and allows applications to separate tasks that handle sensitive data like DRM services to be isolated form other tasks that could otherwise leak sensible information. Software support will be done through the Espressif ESP-IDF to give access to already-known APIs and software tools. The inclusion of the ESP32 pin matrix function for flexible pin assignment to peripherals, BLE and 400kB of memory at a low cost entry are a welcome addition to the Espressif lineup.
Dev boards
Development boards for the ESP32-C3, the ESP32-C3-DevKitC-1 and ESP32-C3-DevKitM-1, have already been announced for sampling. We will put the chip to test when the first samples arrive at Elektor.
