Server Based Solutions for Self-Organizing Networks

Solution
Artesyn Embedded Technologies and CommAgility are well placed to address the data center-based eNodeB pool challenge. For example, a PCI Express (PCIe) version of CommAgility’s AMC-K2L-RF2 card (Figure 2) could provide a low-cost, high-performance wideband RF transceiver and baseband processing card combined. When configured as a RRH it would support a 2x2 MIMO air interface covering frequency bands from 700 MHz to 4 GHz with software defined sub-bands and configurable FDD or TDD operation, and bandwidths from 1.4 MHz to 20 MHz. With a native power output of up to 27 dBm, higher output power could be achieved using external power amplifiers; the card can provide an external control and digital pre-distortion feedback path to support this.
 
Such a PCIe card could perform the key analog front end functionality of the RRH:
• Digital up and down conversion (DUC and DDC)
• Crest Factor Reduction (CFR)
• Digital Pre-Distortion (DPD)
• IQ imbalance correction and nulling
 
Front-haul connectivity can be supported over optical fiber using a front panel SFP+ port. The Texas Instruments TCI6630K2L SoC natively supports CPRI, but the processing provided by its four C66x DSP cores make it well positioned to develop ORI compression or RoE based solutions to reduce the front-haul bandwidth. The front haul also includes the control and management (C&M) channel to support the SDN configuration changes and the collection of CQI metrics.

 

Artesyn’s MaxCore™ Platform family of products (Figure 3) is ideally suited as a host system for these cards. Built around a unique PCI Express Switch, and designed for NEBS, these systems combine high flexibility in configuration with the lowest latency between different cards that form the respective system. This makes the platform a perfect solution for scalable designs from small configurations up to integration into large data centers.
The fabric in the MaxCore Platform is built using the Avago ExpressFabric PCI Express switching silicon. This silicon will operate in a simple PCI Express based single root environment like any other PC, but also allows operation in a virtualized mode. By doing this, it enables operation with multiple root complexes across the same backplane as well as connecting an I/O card’s virtual functions to multiple root complexes, enabling a new level of sharing of resources.

 

A microserver card using two Intel® Xeon® D 16-core CPU complexes and an intelligent network adaptor based on the Intel® FM10840 (‘Red Rock Canyon’) switch and network interface enable applications that combine connectivity to front and backhaul and, together with the CommAgility card, directly connect to RRHs in a very small form factor.
When applied to this application, multiple Artesyn SharpServer™ microserver cards and multiple Artesyn SharpSwitch™ network adaptor cards (Figures 4 and 5 respectively) can be combined with the CommAgility PCI Express card according to the performance requirements of the actual deployment to create complete single or multiple eNodeBs in a single enclosure. In this context, the solution is scalable from a small system suitable for a sporting venue server room location or a full central office.

 

The SharpServer cards act as a scalable pooled resource running the CommAgilty SmallCellSTACK software across multiple cards in the solution. By building an intelligent scheduler within the stack, access can be provided to network statistics from all of the supported PHYs and the developer can allow control of the RRH configuration over the front-haul control and maintenance channels. It is also a suitable location to host the EPC in small local networks, providing a self-contained server-hosted network.

The glue between the protocol stack and the DAS is the PHY. The PHY and its partitioning is probably the greatest area of discussion within the C-RAN architecture. CommAgility’s AMC-D24A4 (Figure 6) is a high-performance highly-configurable processing card which has the flexibility to support multiple variations of Cloud RAN architectures. Designed for rack-mounted chassis based systems it can be readily adapted for the data center server.

 

Such a card can support up to eight ORI connections to optical front SFP+ ports. The FPGA can be configured to perform the ORI decompression and send channels back to the DSP for baseband processing. Alternatively, ORI switching support can be added to the FPGA to re-balance the baseband load across multiple baseband cards in the system as shown diagrammatically in Figure 7.
 

An alternative solution using RoE can be readily achieved using a similar architecture. In this case, the RRH implements a RoE protocol on the DSP and the Gigabit Ethernet (GbE) links from the RRH are terminated at the server, either directly to the FPGA SFP+ connectors or via the top-of-rack switch. The baseband card FPGA can then implement RoE routing and termination to balance the processing load.
Connection between the PHY and stack is supported by the Small Cell Forum Femto Application Programming Interface (FAPI) to provide an open standard MAC-PHY API.
 
Conclusion
Although 5G brings challenges to the conventional network architecture, the re-imagining of that architecture for 5G also bring opportunities to support functionality not previously achievable. In this paper we have discussed some of the emerging technologies and routes which can be taken to exploit these new technologies.

We find that that the majority of the building blocks already exist. But to fully realize the potential of a server-room based solution, the blocks need to be integrated so that flexible hardware configuration and low-level access to protocol stacks work in tandem.

By combining the Artesyn and CommAgility product lines, an integrated solution can be built from these components that perfectly scales from very small to very large deployments, using the same basic infrastructure as well as the same software.


Web Link
http://www.commagility.com


The Authors
 

Paul Moakes PhD MIET is Technical Director at CommAgility. He has previously been employed by Motorola, Blue Wave Systems and Marconi Instruments. He holds two patents in the field of MicroTCA and AdvancedMC. He received his PhD in Electrical and Electronic Engineering from Sheffield University, and a First Class Honours degree in Electronic Communications and Computer Systems Engineering from Bradford University. Christof Wehner is a Senior Technical Marketing Architect for the Embedded Computing business of Artesyn Embedded Technologies, with a focus on new technology, customer applications and technical advice on application architectures. Christof also represents Artesyn in the ETSI Mobile-Edge Computing (MEC) work group. In his 25 years in the embedded industry, Christof has worked in technical support functions including management and marketing of technical support, strategic marketing and training for various companies including Force Computers and Radisys. A widely published author and accomplished speaker, he has a degree in Physics from Dortmund University.