Communications engineers will be interested in a new integrated circuit from Motorola known as the MC1699 divide-by-four gigahertz counter. This is a very high speed device for prescaler applications. The clock input requires an a.c.- coupled driving signal of 160 mVpp amplitude (typical). A sine-wave signal is acceptable for frequencies from 50 MHz to 1.2 GHz. Below 50 MHz wave- shaping is recommended. With pulses which have good rise and fall times (in the order of 1 to 2 nsec), the MC1699 has no lower limit on clock frequency. The clock toggles two divide-by- two stages and the complemen- tary outputs (50% duty cycle) are taken from the second stage.
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