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CPU gear box
While many computer enthusiasts are keen on getting their system to run at the highest possible clock speed, there are often quite awkward constraints posed by relatively slow, bus-connected support chips, and the ensuing frustration after failing to get reliable system operation at, say, double the "old" clock speed may readily lead to abandoning the speed-up project altogether, for lack of precise information regarding the necessary clock-based synchroniz- ation between CPU and peripheral chip(s). A noteworthy example of this hap- pening in practice is the go at incor- poration of the Type 9367 CRT controller in a 6502-based computer system running at 2 MHz; the specific application concerns the high- resolution graphics card published in Elektor Electronics, November 1985 ff. This circuit ensures a correctly timed, synchronized slow-down of the system clock speed, when ap- propriate for CPU access to a mem- ory-mapped (E150-E15F) device. Following the reception of a high level ...
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