8098 Evaluation Board

46 In Fig. 8b, IC1 is the 8098 micro-controller; crystal X1 and capacitors C3 and C4 are connected to the on-chip oscillator to con- trol the frequency of operation. The un- used I/O lines of the 8098 are connected to CN2 with resistor array RM1 providing a valid logic low to unconnected inputs. The data bus is 8 bits wide and is time-multi- plexed with the lower eight address bits. The octal three-state latch, IC6, uses the signal ADV to store the lower eight bits of the address at the start of every memory cycle. Circuit IC7 is an octal, three-state, bi- directional buffer that is used to buffer the data bus. The buffer is enabled for writes at all times except during read cycles: the RD line is used to control the direction. Circuit IC8 is a dual 2-to-4 line decoder that provides three memory chip-select signals and four i/o chip-select signals. The ADV signal is used as a strobe to ensure that the chip-select signals are asserted only during valid memory or I/O cycles. The i/o...