4-bit BCD flash converter

There are many ways of designing an analogue-to-digital converter: the present design is aimed particularly at a high speed. The speed is determined primarily by the reaction time of comparators (here about 1 µs). The design has a drawback: the number of components is direcly proportional to the number of levels that the converter can cope with. In the present design. this is limited to ten (if none of the comparators detects the exceeding of a level, the input is below the lowest level, and this is recognized as zero [10th levell]).