Synchronisation signals have a rather complicated structure. It’s not easy to generate them accurately using analogue circuitry. By contrast, a design based on a CPLD is a lot easier. This design uses the experimenter’s board described in the May 2004 issue (‘Design Your Own IC’). The hardware extension for this generator is shown in Figure 1. The extension could hardly be simpler. The 20-way connector must be connected to connector K3 of the experimenter’s board by a flat cable. The synchronisation signals on pin 4 are routed to the output connector via voltage divider R1/R2.