Lattice Extends Industry-leading Security and System Control to Automotive Applications
MachXO3LF and MachXO3D FPGAs are supported by Lattice’s integrated design software suite, Lattice Diamond®, a complete GUI-based FPGA design and verification environment with leading-edge design and implementation tools optimized for low-power Lattice FPGAs. The latest version of Lattice Diamond, version 3.11.3, is now available.
For more information about the MachXO3LF FPGA family, please visit: https://www.latticesemi.com/MachXO3.
For more information about the MachXO3D FPGA family, please visit: https://www.latticesemi.com/MachXO3D.
For more information about Lattice Diamond design software, please visit: https://www.latticesemi.com/Diamond.
Key features of the new MachXO3LF and MachXO3D FPGA family include:
- Support for an extended operating range -40°C to +125°C (junction temperature)
- Robust control – provides instant-on control hub that reliably powers the platform up and power and simplifies deployment by:
- Single 3.3V or 1.2V supply operation
- Highest I/O-to-logic ratio
- Enables deterministic I/O operation by eliminating power-up glitches with default pull-down and maintaining signal integrity with program slew rate, drive strength, and hysteresis
The MachXO3D FPGAs’ security features include:
- On-chip flash memory – secures bitstream and user data against malicious attacks via OTP mode and password protection. MachXO3D has an immutable embedded security block to enable security compliant with NIST SP-800-193 Platform Firmware Resilience (PFR) guidelines for protecting, detecting, and recovering firmware from unauthorized access.
- On-chip flash enables single-chip, instant-on, and dual-boot images for fail-safe programming and in-field updates
- Flexible system with secure reprogramming - supports reliable in-system updates with:
- Fail-safe reprogramming enabled by secure dual boot
- Configuration engine that prevents unauthorized access to configuration memory
- On-Chip flash that eliminates external memory and enables instant-on
- Mixed voltage support on I/O that eliminates GTL buffers and level shifters
- Per-pin programmability
For more information about the MachXO3LF FPGA family, please visit: https://www.latticesemi.com/MachXO3.
For more information about the MachXO3D FPGA family, please visit: https://www.latticesemi.com/MachXO3D.
For more information about Lattice Diamond design software, please visit: https://www.latticesemi.com/Diamond.
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