The new PIC32MM family, currently Microchip’s lowest power 32-bit PIC32 family, features sleep modes down to as little as 500 nA. Filling the gap between the PIC24F XLP and PIC32MX families, the new family also offers so-called core independent peripherals that once initialized can function without intervention of or loading the MCU core.

The core independent peripherals, such as Configurable Logic Cells (CLC) and Multiple-output Capture Compare PWMs (MCCPs) are especially useful in applications requiring extremely short response times like sensorless BLDC motor controllers. The new devices achieve a 79 CoreMark score at 25MHz operation thanks to the compact microMIPS instruction set, a MIPS microAptiv UC core, and a shadow register set for fast interrupt context switching.

The entire family of PIC32MM devices is of course supported by the MPLAB ecosystem including the MPLAB X IDE and XC32 compiler. The MPLAB Code Configurator, a plug-in to the MPLAB X, helps with easy peripheral set-up, device configuration and pin mapping.